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| RF5184 0 Typical Applications * 3V W-CDMA Cellular Handset (Band 5) * 3V W-CDMA US-PCS Handset (Band 2) DUAL-BAND 800MHz/1900MHz W-CDMA POWER AMPLIFIER MODULE Product Description 4.0 -A-B- The RF5184 is a high-power, high-efficiency linear amplifier module specifically designed for 3V handheld systems. The device is manufactured on an advanced third generation GaAs HBT process, and was designed for use as the final RF amplifier in W-CDMA handheld digital cellular equipment, spread-spectrum systems, and other applications in the 824MHz to 849MHz band (Band 5) and 1850MHz to 1910MHz band (Band 2). The RF5184 has a digital control line for low power applications to lower quiescent current. The RF5184 is assembled in a 24-pin, 4mmx4mm, QFN package. 1.00 0.80 0.10 C 4.0 0.10 C B 2 PL 0.10 C A 2 PL 0.2 C Shaded area indicates pin 1. Dimensions in mm. -C- 0.50 TYP 0.10 C A B 0.55 TYP 0.35 SEATING PLANE Scale: None 0.10 C 2.60 2 PL 2.40 0.05 TYP 0.00 0.203 TYP 0.08 C 0.30 TYP 0.18 0.10 M C A B TYP 0.08 0.03 0.50 TYP 0.30 Optimum Technology Matching(R) Applied Si BJT Si Bi-CMOS InGaP/HBT VMODE PCS Package Style: QFN, 24-Pin, 4x4 GaAs HBT SiGe HBT GaN HEMT VCC1 PCS VCC2 PCS VCC2 PCS GaAs MESFET Si CMOS SiGe Bi-CMOS Features * Input/Output Internally Matched@50 * 43% Peak Linear Efficiency for Cell Band * -41dBc ACLR @ 5MHz for Cell Band 24 VREG - PCS 1 RF IN - PCS 2 VREG - CELL 3 VMODE - CELL 4 RF IN - CELL 5 VCC1 - CELL 6 7 NC VCC BIAS 23 22 21 20 VCC2 PCS 19 18 NC 17 NC 16 RF OUT - PCS * -40dBc ACLR@5MHz for PCS Band * 44% Peak Linear Efficiency for PCS Band * HSDPA Capable Bias PCS Bias Cell 15 NC 14 RF OUT - CELL 13 NC Ordering Information RF5184 Dual-Band 800MHz/1900MHz W-CDMA Power Amplifier Module RF5184PCBA-410 Fully Assembled Evaluation Board RF Micro Devices, Inc. 7628 Thorndike Road Greensboro, NC 27409, USA Tel (336) 664 1233 Fax (336) 664 0454 http://www.rfmd.com 8 NC 9 VCC2 CELL 10 VCC2 CELL 11 VCC2 CELL 12 NC Functional Block Diagram Rev A0 060323 2-689 RF5184 Absolute Maximum Ratings Parameter Supply Voltage (RF off) Supply Voltage (POUT 31dBm) Control Voltage (VREG) Input RF Power Mode Voltage (VMODE) Operating Temperature Storage Temperature Rating +8.0 +5.2 +3.9 +10 +3.9 -30 to +110 -40 to +150 Unit V V V dBm V C C Caution! ESD sensitive device. RF Micro Devices believes the furnished information is correct and accurate at the time of this printing. However, RF Micro Devices reserves the right to make changes to its products without notice. RF Micro Devices does not assume responsibility for the use of the described product(s). Parameter High Power Mode W-CDMA Cell Band (VMODE Low) Operating Frequency Range Linear Gain Maximum Linear Output Linear Efficiency Maximum ICC ACLR @ 5MHz ACLR @ 10MHz Input VSWR Stability In-Band Stability Out-of-Band Noise Power Specification Min. Typ. Max. Unit Condition T=25oC Ambient, VCC =3.4V, VREG =2.8V, VMODE =0V, and POUT =28dBm for all parameters (unless otherwise specified). 824 26.0 28 39 -37 -48 28.5 43 432 -41 -54 2:1 849 31.0 476 MHz dB dBm % mA dBc dBc No oscillation>-70dBc No damage At 45MHz offset. T=25oC Ambient, VCC =3.4V, VREG =2.8V, VMODE =2.8V, and POUT =16dBm for all parameters (unless otherwise specified). 6:1 10:1 -133 dBm/Hz Mid Power Mode W-CDMA Cell Band (VMODE High) Operating Frequency Range Linear Gain Maximum Linear Output Maximum ICC ACLR @5MHz ACLR @10MHz Input VSWR Output VSWR Stability 824 25 16 -37 -48 27 125 -41 -59 2:1 849 30 150 MHz dB dBm mA dBc dBc 6:1 10:1 No oscillation>-70dBc No damage T=25oC Ambient, VCC =0.75V, VREG =2.8V, VMODE =2.8V, and POUT =8dBm for all parameters (unless otherwise specified). Low Power Mode W-CDMA Cell Band (VMODE High) Operating Frequency Range Linear Gain Efficiency ACLR @ 5MHz ACLR @ 10MHz 824 22 11.5 -42 -55 849 MHz dB % dBc dBc 2-690 Rev A0 060323 RF5184 Parameter High Power Mode W-CDMA PCS Band (VMODE Low) Operating Frequency Range Linear Gain Maximum Linear Output Linear Efficiency Maximum ICC ACLR @ 5MHz ACLR @ 10MHz Input VSWR Output VSWR Stability Noise Power 1850 26.5 28 39 -36 -47 29.0 44 422 -40 -51 2:1 1910 31.5 MHz dB dBm % mA dBc dBc No oscillation>-70dBc No damage At 80MHz offset. T=25oC Ambient, VCC =3.4V, VREG =2.8V, VMODE =2.8V, and POUT =16dBm for all parameters (unless otherwise specified). 1850 25.5 16 -36 -47 28.0 -42 -58 125 2:1 1910 30.5 MHz dB dBm dBc dBc mA No oscillation>-70dBc No damage T=25oC Ambient, VCC =0.75V, VREG =2.8V, VMODE =2.8V, and POUT =8dBm for all parameters (unless otherwise specified). 1850 22 -43 -58 11.5 1910 MHz dB dBc dBc % Specification Min. Typ. Max. Unit Condition T=25oC Ambient, VCC =3.4V, VREG =2.8V, VMODE =0V, and POUT =28dBm for all parameters (unless otherwise specified). 476 6:1 10:1 -137 dBm/Hz Mid Power Mode W-CDMA PCS Band (VMODE High) Operating Frequency Range Linear Gain Maximum Linear Output ACLR @ 5MHz ACLR @ 10MHz Maximum ICC Input VSWR Output VSWR Stability 150 6:1 10:1 Low Gain Mode W-CDMA PCS Band (VMODE High) Operating Frequency Range Linear Gain ACLR @ 5MHz ACLR @ 10MHz Efficiency Rev A0 060323 2-691 RF5184 Parameter Power Supply Supply Voltage High Power Idle Current - Cell Mid Power Idle Current - Cell Low Power Idle Current - Cell VREG Current - Cell High Power Idle Current - PCS Mid Power Idle Current - PCS Low Power Idle Current - PCS VREG Current - PCS VMODE Current RF Turn On/Off Time DC Turn On/Off Time Total Current (Power Down) VREG Low Voltage (Power Down) VREG High Voltage (Recommended) VREG High Voltage (Operational) VMODE Voltage VMODE Voltage 3.2 45 35 3.4 60 45 42 2.5 70 60 57 2 125 1.2 2 0.2 2.8 4.2 80 70 4.0 95 85 4 350 6 40 2.0 0.5 2.95 3.0 0.5 3.0 V mA mA mA mA mA mA mA mA uA uS uS uA V V V V V Specification Min. Typ. Max. Unit Condition VCC =0.75V 45 40 VCC =0.75V 0 2.75 2.7 0 2.0 High Gain Mode Low Gain Mode 2-692 Rev A0 060323 RF5184 Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 Pkg Base Function Description VREG_PCS Regulated voltage supply for PCS band amplifier bias circuit. In power RFIN_PCS VREG_Cell VMODE_ Cell RFIN_Cell VCC1_Cell NC NC VCC2_Cell VCC2_Cell VCC2_Cell NC NC RFOUT_Cell NC RFOUT_ PCS NC NC VCC2_PCS VCC2_PCS VCC2_PCS VCC1_PCS VCC BIAS VMODE_ PCS GND PCS band RF input internally matched to 50. This input is internally AC-coupled. Regulated voltage supply for Cell band amplifier bias circuit. In power down mode, both VREG_Cell and VMODE_Cell need to be LOW (<0.5V). Cell band mode control pin. For nominal operation (High Power mode), VMODE_Cell is set LOW. When set HIGH, devices are biased lower to improve efficiency. Cell band RF input internally matched to 50. This input is internally AC-coupled. Cell band first stage collector supply. A 2200uF and a 4.7F decoupling capacitors are required. No connection. Do not connect this pin to any external circuit. No connection. Do not connect this pin to any external circuit. Cell band output stage collector supply. Please see the schematic for required external components. Same as Pin 9. Same as Pin 9. No connection. Do not connect this pin to any external circuit. No connection. Do not connect this pin to any external circuit. Cell band RF output. Internally AC-coupled. No connection. Do not connect this pin to any external circuit. PCS band RF output. Internally AC-coupled. No connection. Do not connect this pin to any external circuit. No connection. Do not connect this pin to any external circuit. PCS band output stage collector supply. Please see the schematic for required external components. Same as Pin 19. Same as Pin 19. PCS band first stage collector supply. A 4.7F decoupling capacitor is required. Bias circuit supply voltage. PCS band mode control pin. For nominal operation (High Power mode), VMODE_PCS is set Low. When set HIGH, devices are biased lower to improve efficiency. The backside of the package should be soldered to a top side ground pad which is connected to the ground plane with multiple vias. The pad should have a short thermal path to the ground plane. Interface Schematic down mode, both VREG_PCS and VMODE_PCS need to be LOW (<0.5V). Rev A0 060323 2-693 RF5184 Evaluation Board Schematic - W-CDMA VCC BIAS VMODE_PCS C6 4.7 F C 4.7 F C16 2200 pF C2 4.7 F C13 2200 pF VCC1_PCS C6 4.7 F R1 0 C10 2200 pF VCC2_PCS 105 mils VREG_PCS C9 1000 pF C17 0.1 F C1 22 F 24 50 strip RF IN - PCS 2 VREG_Cell C7 4.7 F C14 2200 pF 3 4 5 C4 4.7 F 6 7 1 23 22 21 20 19 18 17 50 strip 16 RF OUT_PCS C18 0.5 pF 50 strip 14 13 RF OUT_Cell Bias PCS Bias Cell 15 8 9 10 11 12 VMODE_Cell 50 strip RF IN_Cell C11 2200 pF C8 4.7 F VCC1_Cell 50 strip, Length = 110 mils VCC2_Cell C12 2200 pF C5 22 F 2-694 Rev A0 060323 RF5184 PCB Design Requirements PCB Surface Finish The PCB surface finish used for RFMD's qualification process is electroless nickel, immersion gold. Typical thickness is 3inch to 8inch gold over 180inch nickel. PCB Land Pattern Recommendation PCB land patterns are based on IPC-SM-782 standards when possible. The pad pattern shown has been developed and tested for optimized assembly at RFMD; however, it may require some modifications to address company specific assembly processes. The PCB land pattern has been developed to accommodate lead and package tolerances. PCB Metal Land Pattern A = 0.64 x 0.28 Typ. B = 0.28 x 0.64 Typ. C = 2.50 Sq. D = 1.28 x 0.64 Typ. Dimensions in mm. 2.00 1.00 0.50 Pin 24 B Pin 1 B B D Pin 18 A 0.50 Typ. A A C A A A 0.55 Typ. B 0.55 Typ. 1.80 Typ. 2.05 3.05 B D B A A A A A A 1.25 2.50 Typ. Pin 12 Figure 1. PCB Metal Land Pattern (Top View) Rev A0 060323 2-695 RF5184 PCB Solder Mask Pattern Liquid Photo-Imageable (LPI) solder mask is recommended. The solder mask footprint will match what is shown for the PCB metal land pattern with a 2mil to 3mil expansion to accommodate solder mask registration clearance around all pads. The center-grounding pad shall also have a solder mask clearance. Expansion of the pads to create solder mask clearance can be provided in the master data or requested from the PCB fabrication supplier. A = 0.74 x 0.38 (mm) Typ. B = 0.38 x 0.74 (mm) Typ. C = 2.60 (mm) Sq. 2.50 Typ. 0.50 Typ. Pin 24 Pin 1 Dimensions in mm. B A A A A A A B B B B B B Pin 18 0.50 Typ. A A C A A A A B B B B B Pin 12 1.25 2.50 Typ. 0.55 Typ. 0.55 Typ. 1.25 Figure 2. PCB Solder Mask (Top View) 2-696 Rev A0 060323 |
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